By Teylor Bremekamp , PMP, RCDD, Fiber Network Design Engineer, Sumitomo Electric Lightwave
In this post: why optical interconnects are moving from the switch faceplate toward the ASIC, what that shift means for network power at hyperscale, how pluggable, linear pluggable (LPO), near-package (NPO), and co-packaged optics (CPO) differ, which material platforms are competing beneath them, and what the transition means for infrastructure planning from fiber to facility.
The major roadmaps in AI infrastructure agree that optics are moving closer to compute, but how that shift takes shape is still an open question. Several integration approaches are competing to carry light over the last few inches to the chip, and each step closer—onto the board, beside the ASIC, into the package itself—changes where the lasers live, how heat leaves the package, what the faceplate is for, how a component gets replaced, and what the glass connecting it all must do.
For those of us planning infrastructure through this transition, those changes matter more than where each approach wins.
Inside every network switch, data starts as electrical signals, traveling a few inches of copper from the switching chip to the optics at the faceplate, where it becomes light. Each new generation of switch silicon roughly doubles per-port and per-lane network speeds, and the electrical signals crossing those inches double with them.
At the speeds defined by the IEEE 802.3dj 1.6T Ethernet standard, those few inches are becoming too far. Signals degrade over copper before they arrive, and a growing share of the switch's power is spent forcing them through. Data traveling as light over glass loses almost nothing.
While a primary reason for moving optics closer to the onboard chips is out of necessity due to SerDes lane speeds and signal degradation issues on longer copper trace runs, another important motivation for hyperscalers and hardware manufacturers is the total power cost of networking. In a hyperscale AI data center sized around 1 GW, an estimated 15% of the total power budget is just for networking. When using traditional pluggable optics, this equates to ~150 MW of power, just to move data around within the data center.
When migrating to CPO/NPO architectures for networking and compute, removing power-hungry digital signal processors (DSPs) and re-timers saves an estimated 50% of the networking power budget. These savings allow hyperscalers to reclaim up to 75 MW of networking power budget and re-allocate it directly back into more compute within the same 1 GW footprint.
So the industry is moving the conversion point inward, driven by both signal integrity and the power budget.
With the electrical-to-optical conversion moving closer to the switching chip, four approaches offer different answers to the question: how close? Traditional pluggable transceivers keep the conversion at the faceplate, with a DSP cleaning up the electrical link. Linear pluggable optics (LPO) stay at the faceplate but remove the DSP, trading margin for power savings. Near-package optics (NPO) move the optical engine onto the board, beside the ASIC, while maintaining serviceability due to socketed/replaceable designs. Co-packaged optics (CPO) mount it on the ASIC's own package, mere millimeters from the silicon.
Ultimately, "how close" comes down to priorities that differ by network tier. The first co-packaged switch platforms have begun shipping into hyperscale AI fabrics, where port density and power are top of mind. Where reach, interoperability, and quick replacement matter most, pluggables keep the advantage, and LPO and NPO are middle ground for operators who want power savings without giving up equipment serviceability.
The closer the optical engine sits to the ASIC, the more efficient data transmission gets, due to shorter copper runs. That efficiency is measured in picojoules per bit (pJ/bit), the energy spent moving a single bit, where lower is better. LPO is the first incremental step, with further power efficiency gains at NPO and CPO.
Because CPO shrinks the electrical path from centimeters to millimeters, signal degradation nearly disappears, and architects can remove the DSPs and re-timers from the optical path entirely—driving the optics from the host ASIC's native SerDes instead. That is where the power savings come from.
|
Metric |
Traditional Pluggable Optics |
Co-Packaged Optics |
Net Savings |
|
Energy Efficiency (industry estimates) |
15–20 pJ/bit |
5–10 pJ/bit |
~50% lower module draw |
|
Backend Network (GPU scale-out) |
~100 MW |
~50–60 MW |
40–50 MW saved |
|
Front-End Network (storage & cloud) |
~20–50 MW |
~10–25 MW |
10–25 MW saved |
|
Combined Network Total |
120–150 MW |
60–85 MW |
60–75 MW reclaimed |
Note: Energy efficiency figures reflect widely cited industry estimates. Network power figures are modeled on a 1 GW facility with networking at 15% of total power budget. At roughly 1,000 W per next-generation accelerator, reclaiming that power frees enough headroom for tens of thousands of additional GPUs inside the same 1 GW footprint.
LightCounting expects pluggable modules to carry the majority of data center optical links through the end of the decade, and Yole Group does not see large-scale CPO deployment before 2028. The consensus is coexistence, with several architectures serving different tiers of the network at once.
The material platforms are also in play. Silicon photonics and thin-film lithium niobate (TFLN) anchor today's CPO and NPO optical engines, while an emerging wave of electro-optic polymers, quantum-dot comb lasers, and micro-LED arrays is moving from research labs and consortia like the OIF and the Open Compute Project into physical evaluation. Each platform makes different demands of the glass it connects to, and it is too early to say which combination of approaches will carry which network tier. Across hyperscalers, there are variations in which direction each are making investments as their network architectures and appetites for power savings vs. serviceability vary.
Each of the four approaches changes the physical layer—the lasers, optics, connectors, and glass that actually move the bits—in its own way, and every one of them asks more of it.
CPO, the deepest integration, shows the demand most clearly. It removes the transceiver from the faceplate but not the fiber. The entire faceplate now belongs to fiber, and glass that once simply plugged into a transceiver cage now aligns to photonic circuitry at tolerances measured in fractions of a micron, holding that alignment against the heat of kilowatt-class silicon. Without transceiver cages taking up space and shedding heat, the front panel can carry far denser arrays of single-mode fiber, with very small form factor (VSFF) connectors becoming the network’s front door.
Volume aside, integration is changing what kind of glass and connectivity the network needs. Silicon photonics engines rely on external laser sources, requiring new polarization-maintaining fiber assemblies from the external laser source, a fiber type that until recently had no volume role in the data center. Coherent and high-power links require angled, high-return-loss terminations. Next-gen compute trays are pushing blind-mate optical connections to the rear of the rack, where expanded beam interfaces tolerate the dust and mating cycles better than physical-contact ferrules. Multi-core fiber condenses parallel channels into a single strand where pathway space runs out. And where wavelength multiplexing or comb lasers win instead, raw fiber counts compress, with tighter specifications on every strand.
Aligning fiber to photonics is not a new challenge, but the work used to happen inside one vendor's module. Integration moves it to the boundaries between companies. Once the optical engine, the fiber array unit (FAU), the connector, and the cable come from different sources, a sub-micron tolerance becomes a shared responsibility.
Though roadmaps may not align on a specific architecture, they do agree about where things are headed. My suggestion is for network operators and designers to:
Two of these takeaways sit closer to facilities than to networking, and that brings us to my bottom line. Optics are integrating inward, but their requirements are reaching outward—into pathway sizing, panel selection, and day-to-day maintenance practice. Decisions that once lived in separate teams now need to be made together.
Navigating this transition is not something any operator, or any manufacturer for that matter, can do alone. Our team is here to help, from comparing notes to manufacturing at scale. For more Next Generation Thinking™, follow Sumitomo Electric Lightwave on LinkedIn and YouTube.
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About the author: Teylor Bremekamp, PMP, RCDD, is a fiber network design engineer with Sumitomo Electric Lightwave.
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