Next-Generation VCSEL Applications in the AI Factory

By Teylor Bremekamp , PMP, RCDD, Fiber Network Design Engineer, Sumitomo Electric Lightwave

In this post:  VCSELs are evolving to serve the 0–50 meter scale-in and scale-up links of the AI factory, at 1060 nanometers, as single-mode devices, and in "slow and wide" arrays over multi-core fiber. IEEE P802.3ds is defining 200G-per-lane Ethernet over multimode fiber for 30–50 meter accelerator-to-switch links. Installed OM4 will reach 40 meters. A new fiber grade, provisionally called OMz, will reach 50 meters. Single-mode fiber remains my pick for new AI backends. 

In my last article, I made several recommendations for network operators and designers, among them that they standardize new backend architectures on single-mode fiber, which the major roadmaps assume at terabit lane rates. I stand by that recommendation, even as I've followed with interest the work of the IEEE task force for 200G-per-lane multimode.

For short-reach scale-in and scale-up network architectures, new and emerging VCSEL technologies, multimode and single-mode alike, continue to be developed at a rapid pace, and this article looks at what may be adopted in the coming years.

The VCSEL Business Case for Short-Reach Optical Links

“The most likely realisation of co-packaged optics for scale-up will be silicon photonics micro-ring resonators, but VCSELs will put up a good fight.” - Maxim Kuschnerov, Senior Director R&D at Huawei

As copper approaches its physical limit at 200G per lane, the architecture of AI data centers has fractured into distinct physical domains governed strictly by physical distance, latency tolerances, and power budgets. Amid this fracturing, silicon photonics (SiPho) remains the default solution for long-distance scale-out networks (and some scale-up networks), while VCSEL technologies are showing economic and operational advantages for short reaches up to 50 meters.

Scale-out and scale-across applications commonly exceed 50–100+ meter cable lengths, rendering VCSELs impractical, so this article will instead focus on scale-in and scale-up applications, where emerging VCSEL technologies show the greatest promise for near-term adoption.

Operating over a 0–2 meter envelope, scale-in (the internal packaging domain) handles die-to-die, GPU-to-HBM, and localized node extensions, and cannot tolerate conventional network protocol overhead or serialization latency. Scale-up, the accelerator memory fabric, spans 2–50 meters and underpins memory-coherent fabrics like NVIDIA NVLink and UALink; as compute clusters expand to tens of thousands of XPUs, it acts as a single virtual distributed memory pool.

The case for VCSELs has not changed much since 2016; by now it is as well established as VCSELs’ supply chain. Fabricated on fully automated 6-inch wafer lines built for smartphones and automotive sensing, VCSELs use mature gallium arsenide (GaAs) substrates rather than the capacity-constrained indium phosphide (InP) that silicon photonics and edge-emitting lasers depend on. A VCSEL’s larger circular beam aligns comfortably to a 50-micron fiber core, so it can be packaged with standard, high-volume surface mount technology (SMT) instead of the sub-micron active alignment that single-mode optics demand.

And because a two-dimensional array of emitters can be fabricated and packaged as a unit, VCSEL and microLED arrays are a natural fit for slow and wide, no-DSP-required architectures that run dozens of lanes at lower speeds rather than a few at 200G. Multi-core fiber (MCF), already paired with both kinds of array in co-packaged demos, keeps the fiber count down by carrying more of those lanes in a single strand.

Credo’s CEO made the case for slow and wide in three words in his OCP 2026 keynote title: “Wider. Slower. Better.”

Two VCSEL Paths at 200G per Lane

Slow and wide certainly covers the shortest links, in and around the rack. Where the AI factory pushes to 200G per lane on its 30–50 meter accelerator-to-switch links, though, VCSEL technology has diverged into two design paths to handle the dispersion limits that come with it.

A multimode VCSEL has a large aperture, 5–10 microns, which gives it plenty of output power, forgiving alignment, and the advantage of installed multimode fiber and existing SMT packaging lines. But its wide spectrum (~0.6 nm) smears the signal over distance, and at 200G per lane that limits a multimode VCSEL to 30 to 50 meters.

A single-mode VCSEL shrinks the aperture to about 3 microns or adds a mode filter, narrowing the spectrum below 0.1 nm. Reach is the benefit: at 1060 nm, where fiber disperses far less than at 850 nm, a single-mode VCSEL can run kilometers over single-mode fiber. Its small, clean beam also couples into the single-mode cores of multi-core fiber, which is how the co-packaged engines in the next section pack dozens of lanes into one strand. Shrinking the aperture shrinks the signal to a few milliwatts, and the sub-micron alignment that it requires has kept it off high-volume assembly lines so far.

What Changes at the Physical Layer with Integration

Each of the four approaches changes the physical layer—the lasers, optics, connectors, and glass that actually move the bits—in its own way, and every one of them asks more of it.

CPO, the deepest integration, shows the demand most clearly. It removes the transceiver from the faceplate but not the fiber. The entire faceplate now belongs to fiber, and glass that once simply plugged into a transceiver cage now aligns to photonic circuitry at tolerances measured in fractions of a micron, holding that alignment against the heat of kilowatt-class silicon. Without transceiver cages taking up space and shedding heat, the front panel can carry far denser arrays of single-mode fiber, with very small form factor (VSFF) connectors becoming the network’s front door.

Volume aside, integration is changing what kind of glass and connectivity the network needs. Silicon photonics engines rely on external laser sources, requiring new polarization-maintaining fiber assemblies from the external laser source, a fiber type that until recently had no volume role in the data center. Coherent and high-power links require angled, high-return-loss terminations. Next-gen compute trays are pushing blind-mate optical connections to the rear of the rack, where expanded beam interfaces tolerate the dust and mating cycles better than physical-contact ferrules. Multi-core fiber condenses parallel channels into a single strand where pathway space runs out. And where wavelength multiplexing or comb lasers win instead, raw fiber counts compress, with tighter specifications on every strand.

Aligning fiber to photonics is not a new challenge, but the work used to happen inside one vendor's module. Integration moves it to the boundaries between companies. Once the optical engine, the fiber array unit (FAU), the connector, and the cable come from different sources, a sub-micron tolerance becomes a shared responsibility.

2026 Updates to the VCSEL Landscape

Recent developments point to a two-pronged roadmap, where leading manufacturers are simultaneously pursuing single-mode precision and high-density multimode deployments.

• Lumentum is moving away from pushing lanes to unmanageable speeds. At OFC 2026, the company demonstrated a high-density multimode 1060 nm VCSEL array co-packaged with a host ASIC in a fan-out wafer-level package, built on standard semiconductor packaging flows and targeting “slow and wide” scale-up protocols such as UCIe and PCIe, with operation above 150°C.
• Single-mode VCSELs are getting onto multi-core fiber. Fumio Koyama’s group at the Institute of Science Tokyo reported at ECOC 2024 a 16-channel array of 1060 nm single-mode VCSELs, each carrying 100G PAM4, for 1.6-terabit multi-core fiber co-packaged optics, with the array butt-coupled directly to the fiber rather than through a lens assembly.
• The research keeps pushing speed and distance. Jin-Wei Shi’s group at National Central University, Taiwan, has reported single-mode 850 and 1060 nm VCSELs with Zn-diffusion apertures that reach direct-modulation channel bandwidths of 39 GHz at 850 nm and 36 GHz at 1060 nm, and carry 56 Gbit/s error-free over 1 km of few-mode fiber at 850 nm without a DSP.

Every one of these developments raises the question of the fiber underneath. The Ethernet world is answering it for 850 nm and is about to take up the 1060 nm case.

What Is IEEE P802.3ds?

P802.3ds is the IEEE project defining 200G-per-lane Ethernet over multimode fiber and building a multimode path to 1.6 terabits. The 200 Gb/s per Wavelength MMF PHYs Task Force came out of a call for interest in July 2025 with 102 supporters across 61 organizations, and the project was approved on December 10, 2025. Draft 1.3 went out for review in October 2026, with working group ballot planned after the November plenary.

Its reach targets are deliberately narrow: 30–50 meter links in backend networks, connecting accelerators to switches in AI factory environments. The data from 2024 AI cluster deployments showed that 90.5% of accelerator-to-switch connections ran 30 meters or less, and all of them ran 50 meters or less.

Will Installed OM4 and OM5 Support 200G per Lane?

Yes, OM4 and OM5 will support 200G per lane at reduced distances on 850 nanometer interfaces. The task force has agreed to specify OM4 at 40 meters, OM5 at 45 meters, and OM3 at 20 meters. In the table below, the 100G column is sourced from IEEE 802.3db-2022 and 802.3df-2024, and the 200G column from P802.3ds D1.0 comment resolution, June 2026. Comment resolution on Draft 1.3 continues at the November meeting, so figures are still subject to change.

By Teylor Bremekamp , PMP, RCDD, Fiber Network Design Engineer, Sumitomo Electric Lightwave

In this post:  VCSELs are evolving to serve the 0–50 meter scale-in and scale-up links of the AI factory, at 1060 nanometers, as single-mode devices, and in "slow and wide" arrays over multi-core fiber. IEEE P802.3ds is defining 200G-per-lane Ethernet over multimode fiber for 30–50 meter accelerator-to-switch links. Installed OM4 will reach 40 meters. A new fiber grade, provisionally called OMz, will reach 50 meters. Single-mode fiber remains my pick for new AI backends. 

In my last article, I made several recommendations for network operators and designers, among them that they standardize new backend architectures on single-mode fiber, which the major roadmaps assume at terabit lane rates. I stand by that recommendation, even as I've followed with interest the work of the IEEE task force for 200G-per-lane multimode.

For short-reach scale-in and scale-up network architectures, new and emerging VCSEL technologies, multimode and single-mode alike, continue to be developed at a rapid pace, and this article looks at what may be adopted in the coming years.

The VCSEL Business Case for Short-Reach Optical Links

“The most likely realisation of co-packaged optics for scale-up will be silicon photonics micro-ring resonators, but VCSELs will put up a good fight.” - Maxim Kuschnerov, Senior Director R&D at Huawei

As copper approaches its physical limit at 200G per lane, the architecture of AI data centers has fractured into distinct physical domains governed strictly by physical distance, latency tolerances, and power budgets. Amid this fracturing, silicon photonics (SiPho) remains the default solution for long-distance scale-out networks (and some scale-up networks), while VCSEL technologies are showing economic and operational advantages for short reaches up to 50 meters.

Scale-out and scale-across applications commonly exceed 50–100+ meter cable lengths, rendering VCSELs impractical, so this article will instead focus on scale-in and scale-up applications, where emerging VCSEL technologies show the greatest promise for near-term adoption.

Operating over a 0–2 meter envelope, scale-in (the internal packaging domain) handles die-to-die, GPU-to-HBM, and localized node extensions, and cannot tolerate conventional network protocol overhead or serialization latency. Scale-up, the accelerator memory fabric, spans 2–50 meters and underpins memory-coherent fabrics like NVIDIA NVLink and UALink; as compute clusters expand to tens of thousands of XPUs, it acts as a single virtual distributed memory pool.

The case for VCSELs has not changed much since 2016; by now it is as well established as VCSELs’ supply chain. Fabricated on fully automated 6-inch wafer lines built for smartphones and automotive sensing, VCSELs use mature gallium arsenide (GaAs) substrates rather than the capacity-constrained indium phosphide (InP) that silicon photonics and edge-emitting lasers depend on. A VCSEL’s larger circular beam aligns comfortably to a 50-micron fiber core, so it can be packaged with standard, high-volume surface mount technology (SMT) instead of the sub-micron active alignment that single-mode optics demand.

And because a two-dimensional array of emitters can be fabricated and packaged as a unit, VCSEL and microLED arrays are a natural fit for slow and wide, no-DSP-required architectures that run dozens of lanes at lower speeds rather than a few at 200G. Multi-core fiber (MCF), already paired with both kinds of array in co-packaged demos, keeps the fiber count down by carrying more of those lanes in a single strand.

Credo’s CEO made the case for slow and wide in three words in his OCP 2026 keynote title: “Wider. Slower. Better.”

Two VCSEL Paths at 200G per Lane

Slow and wide certainly covers the shortest links, in and around the rack. Where the AI factory pushes to 200G per lane on its 30–50 meter accelerator-to-switch links, though, VCSEL technology has diverged into two design paths to handle the dispersion limits that come with it.

A multimode VCSEL has a large aperture, 5–10 microns, which gives it plenty of output power, forgiving alignment, and the advantage of installed multimode fiber and existing SMT packaging lines. But its wide spectrum (~0.6 nm) smears the signal over distance, and at 200G per lane that limits a multimode VCSEL to 30 to 50 meters.

A single-mode VCSEL shrinks the aperture to about 3 microns or adds a mode filter, narrowing the spectrum below 0.1 nm. Reach is the benefit: at 1060 nm, where fiber disperses far less than at 850 nm, a single-mode VCSEL can run kilometers over single-mode fiber. Its small, clean beam also couples into the single-mode cores of multi-core fiber, which is how the co-packaged engines in the next section pack dozens of lanes into one strand. Shrinking the aperture shrinks the signal to a few milliwatts, and the sub-micron alignment that it requires has kept it off high-volume assembly lines so far.

What Changes at the Physical Layer with Integration

Each of the four approaches changes the physical layer—the lasers, optics, connectors, and glass that actually move the bits—in its own way, and every one of them asks more of it.

CPO, the deepest integration, shows the demand most clearly. It removes the transceiver from the faceplate but not the fiber. The entire faceplate now belongs to fiber, and glass that once simply plugged into a transceiver cage now aligns to photonic circuitry at tolerances measured in fractions of a micron, holding that alignment against the heat of kilowatt-class silicon. Without transceiver cages taking up space and shedding heat, the front panel can carry far denser arrays of single-mode fiber, with very small form factor (VSFF) connectors becoming the network’s front door.

Volume aside, integration is changing what kind of glass and connectivity the network needs. Silicon photonics engines rely on external laser sources, requiring new polarization-maintaining fiber assemblies from the external laser source, a fiber type that until recently had no volume role in the data center. Coherent and high-power links require angled, high-return-loss terminations. Next-gen compute trays are pushing blind-mate optical connections to the rear of the rack, where expanded beam interfaces tolerate the dust and mating cycles better than physical-contact ferrules. Multi-core fiber condenses parallel channels into a single strand where pathway space runs out. And where wavelength multiplexing or comb lasers win instead, raw fiber counts compress, with tighter specifications on every strand.

Aligning fiber to photonics is not a new challenge, but the work used to happen inside one vendor's module. Integration moves it to the boundaries between companies. Once the optical engine, the fiber array unit (FAU), the connector, and the cable come from different sources, a sub-micron tolerance becomes a shared responsibility.

2026 Updates to the VCSEL Landscape

Recent developments point to a two-pronged roadmap, where leading manufacturers are simultaneously pursuing single-mode precision and high-density multimode deployments.

• Lumentum is moving away from pushing lanes to unmanageable speeds. At OFC 2026, the company demonstrated a high-density multimode 1060 nm VCSEL array co-packaged with a host ASIC in a fan-out wafer-level package, built on standard semiconductor packaging flows and targeting “slow and wide” scale-up protocols such as UCIe and PCIe, with operation above 150°C.
• Single-mode VCSELs are getting onto multi-core fiber. Fumio Koyama’s group at the Institute of Science Tokyo reported at ECOC 2024 a 16-channel array of 1060 nm single-mode VCSELs, each carrying 100G PAM4, for 1.6-terabit multi-core fiber co-packaged optics, with the array butt-coupled directly to the fiber rather than through a lens assembly.
• The research keeps pushing speed and distance. Jin-Wei Shi’s group at National Central University, Taiwan, has reported single-mode 850 and 1060 nm VCSELs with Zn-diffusion apertures that reach direct-modulation channel bandwidths of 39 GHz at 850 nm and 36 GHz at 1060 nm, and carry 56 Gbit/s error-free over 1 km of few-mode fiber at 850 nm without a DSP.

Every one of these developments raises the question of the fiber underneath. The Ethernet world is answering it for 850 nm and is about to take up the 1060 nm case.

What Is IEEE P802.3ds?

P802.3ds is the IEEE project defining 200G-per-lane Ethernet over multimode fiber and building a multimode path to 1.6 terabits. The 200 Gb/s per Wavelength MMF PHYs Task Force came out of a call for interest in July 2025 with 102 supporters across 61 organizations, and the project was approved on December 10, 2025. Draft 1.3 went out for review in October 2026, with working group ballot planned after the November plenary.

Its reach targets are deliberately narrow: 30–50 meter links in backend networks, connecting accelerators to switches in AI factory environments. The data from 2024 AI cluster deployments showed that 90.5% of accelerator-to-switch connections ran 30 meters or less, and all of them ran 50 meters or less.

Will Installed OM4 and OM5 Support 200G per Lane?

Yes, OM4 and OM5 will support 200G per lane at reduced distances on 850 nanometer interfaces. The task force has agreed to specify OM4 at 40 meters, OM5 at 45 meters, and OM3 at 20 meters. In the table below, the 100G column is sourced from IEEE 802.3db-2022 and 802.3df-2024, and the 200G column from P802.3ds D1.0 comment resolution, June 2026. Comment resolution on Draft 1.3 continues at the November meeting, so figures are still subject to change.

How Multimode Fiber Is Evolving for the AI Factory

Achieving 50 meters on 850 nm requires a new grade of 50-micron multimode fiber, provisionally called OMz by the task force, which describes it as an addition to OM3, OM4, and OM5, using identical connectors, terminations, and testing equipment.

A second set of interfaces at 1060 nanometers is also in the draft. Lower chromatic dispersion at 1060 nm allows a relaxed bandwidth specification and better manufacturing yield, the same reasons Lumentum and the Koyama group chose the wavelength. Which fiber carries it is still up in the air as of the September 8 editors’ report. Contributors have proposed shrinking multimode’s 50-micron core to roughly 26 or 27 microns. Either way, the fiber would use less germanium at a time of rising germanium prices; couple directly to the sub-20-micron photodetectors that give the best bandwidth; and open a path to multimode multi-core fiber. It would not be compatible with the installed 50-micron base.

The task force will next meet at the IEEE 802 plenary in Bangkok, November 8–13, with these fiber questions on the agenda for November 10.

Conclusion: Why Single-Mode Is Still My Pick for the Overall Backend Network

While multimode is evolving rapidly to serve 30–50 meter accelerator-to-switch links, single-mode remains my firm recommendation for the structural longevity of the backend network. VCSELs over multimode fiber are viable for short, single-generation implementations, but the platform faces the same physics challenge as copper regarding reach degradation with every subsequent lane-speed increase.

• Multimode's reach plateau is crumbling: OM4’s reach successfully held at 100 meters across two generations of lane rates (50G and 100G) because receiver FEC and PAM4 compensated for the added signal degradation. Those architectural tools can no longer buy back distance at 200G per lane, causing OM4's reach to drop sharply to 40 meters.
• Single-mode's reach is stable: OS2 installed a decade ago carried 100G, 400G, and 800G through transceiver refreshes alone, and IEEE 802.3dj keeps the 500-meter DR reach unchanged at 200G per lane.
• Loss budgets are tightening: the 200G-per-lane multimode drafts allow roughly 1.6 dB, down from 1.8 dB; a single-mode DR channel keeps 3 dB over 500 meters.

Ultimately, single-mode leaves the physical fiber asset in place, yielding a significantly lower total cost of ownership (TCO) per facility over decades across the roadmap variants available to hyperscale engineering teams. Whichever path VCSELs take, the fiber underneath them is the longer-lived decision, and for the life of a backend I recommend single-mode.

Single-mode’s true edge in scale-up applications comes when paired with wavelength-division multiplexing (WDM), which keeps cable bundles under control, the key issue for slow and wide architectures, until MCF becomes a widely commercialized solution for scale-up. The fiber type decision ultimately dictates whether an operator must completely re-cable the facility with each generation jump in lane speed. A team refreshing a fabric every few years weighs that operational disruption very differently from an organization amortizing a physical plant over a ten-year horizon. Other long-term variables that data center design and construction teams must weigh include supply chain availability, sensitivity to contamination, and component reliability.

Whatever your time horizon or network scale, connect with us to talk through a build or a migration. For more Next Generation Thinking™, follow Sumitomo Electric Lightwave on LinkedIn and YouTube.

About the author: Teylor Bremekamp, PMP, RCDD, is a fiber network design engineer with Sumitomo Electric Lightwave.